Flicker Noise Characteristics in GaAs MOSFETs

This study reports the flicker noise characteristics in GaAs-based MOSFETs for the first time. With the improvement in Ga 2 O 3 (Gd 2 O 3) insulators, GaAs MOSFETs reveal the possibility for high-speed and high-power applications, resulting from an electronic mobility that is about five times greater than that in Si, and the advantage of semi-insulating substrate. The DC and RF characteristics of GaAs-based MOSFETs have been demonstrated a current density up to 450mA/mm and a f T and f max of 17 and 60 GHz, respectively [1]. However, investigations of flicker noise on these devices, which is powerful to examine both the material and device qualities especially the interface/surface imperfections, have not been reported to date. In this work, flicker noise of GaAs MOSFETs is investigated, which provides valuable information on possible noise origins and directions to further improve the material quality and device performance. Fig.1 shows the device structure o f a depletion-mode (D-mode) n-channel GaAs MOSFET, which consisted of an undoped GaAs buffer and a 900 Å GaAs channel layer with a Si doping concentration of 4×10 17 cm-3. The layers were epitaxially grown on (100) semi-insulating GaAs substrate using a multi-chamber MBE system. The gate dielectric (a mixture of Ga 2 O 3 and Gd 2 O 3) was deposited by electron-beam evaporation from a single crystal Ga 5 Gd 3 O 12 garnet. The ohmic and gate metals were AuGe/Ni/Au and Ti/Pt/Au, respectively. Fig. 2 presents the DC I-V curves for a 2-finger device with a W/L ratio of 200 µm/1 µm. The device demonstrated a well-defined pinch-off characteristics at V GS =-1.5 V. The measured results also indicated a breakdown voltage higher than 10 V, which is substantially higher than typical Si-based MOSFETs and excellent for high-power applications. Fig. 3 shows the normalized drain noise current spectral density as a function of gate bias under V DS = 2.5 V. Compared to modern CMOS technology, the typical noise spectral density in 0.13-µm NMOS technology is in a range of 10-11 ~10-9 Hz-1 (at 10 Hz, under similar bias conditions), which is comparable to the GaAs MOSFETs reported here. Fig. 4 plots the slope γ of the 1/f γ characteristics as a function of the gate bias. It was found that the extracted values ranged from ~ 0.65 to 1, and also increases with the gate bias. Theoretically, the slope γ should be one …